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| +----+ +----+ +----+ +----+ |CPU0| |CPU1| |CPU2| |CPU3| +----+ +----+ +----+ +----+ +-+ +-+ +-+ +-+ | | | | +---v-----v--+ +--v------v--+ | L1 Cache | | L2 Cache | +------+-----+ +------+-----+ | | +------v----------------v-----+ | L2 Cache | +-----------------------------+
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Cache 初始化
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| kernel_start \->setup_arch \->cpu_cache_init \->r4k_cache_init
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| #define cpu_dcache_size() (32 * 1024) #define cpu_dcache_ways() 8 #define cpu_dcache_line_size() 32 #define cpu_icache_size() (32 * 1024) #define cpu_icache_ways() 8 #define cpu_icache_line_size() 32
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cpuinfo_mips
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| struct cpuinfo_mips { unsigned int udelay_val; ...
unsigned int processor_id; unsigned int fpu_id; unsigned int msa_id; unsigned int cputype; ... } __attribute__((aligned(SMP_CACHE_BYTES)));
extern struct cpuinfo_mips cpu_data[]; #define current_cpu_data cpu_data[smp_processor_id()] #define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
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file: arch/mips/include/asm/cpu-info.h
- 初始化:
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| struct cpuinfo_mips cpu_data[NR_CPUS] __read_mostly; EXPORT_SYMBOL(cpu_data);
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file: arch/mips/kernel/setup.c