Ticket spinlocks

typedef struct {
	union {
		u32 slock;
		struct __raw_tickets {
#ifdef __ARMEB__
			u16 next;
			u16 owner;
#else
			u16 owner;
			u16 next;
#endif
		} tickets;
	};
} arch_spinlock_t;

#define __ARCH_SPIN_LOCK_UNLOCKED	{ 0 , 0 }

void __raw_spin_lock_init(raw_spinlock_t *lock, const char *name,
			  struct lock_class_key *key)
{
#ifdef CONFIG_DEBUG_LOCK_ALLOC
	/*
	 * Make sure we are not reinitializing a held lock:
	 */
	debug_check_no_locks_freed((void *)lock, sizeof(*lock));
	lockdep_init_map(&lock->dep_map, name, key, 0);
#endif
  //初始化，next=owner=0
	lock->raw_lock = (arch_spinlock_t)__ARCH_SPIN_LOCK_UNLOCKED;
	lock->magic = SPINLOCK_MAGIC;
	lock->owner = SPINLOCK_OWNER_INIT;
	lock->owner_cpu = -1;
}

EXPORT_SYMBOL(__raw_spin_lock_init);

static inline int arch_spin_trylock(arch_spinlock_t *lock)
{
	unsigned int tmp;
	arch_spinlock_t lockval;

	asm volatile(ARM64_LSE_ATOMIC_INSN(
	/* LL/SC */
  //prfm: Prefetch Memory (register)预取
  //pstl1strm: 表示预取数据为一级Cache的流式存储
  //将lock结构存储到一级Cache，提高访问速度
	"	prfm	pstl1strm, %2\n"
  //赋值，将lock赋值给lockval
	"1:	ldaxr	%w0, %2\n"
  //eor:按位异或
  //ror:循环右移
  //相当于if(next == owner)
	"	eor	%w1, %w0, %w0, ror #16\n"
  //比较如果tmp不是0，跳转标号2，next与owner不相等
	"	cbnz	%w1, 2f\n"
  /* next == owner，该锁未被使用，no busy */
  //lockval中的next加1
	"	add	%w0, %w0, %3\n"
  //将lockval写入lock，并保存赋值状态到tmp
	"	stxr	%w1, %w0, %2\n"
  //如果tmp不等于0，则跳转标号1
	"	cbnz	%w1, 1b\n"
  /* next != owner, 该锁已被使用，busy */
	"2:",
	/* LSE atomics */
  //将lock赋值给lockval
	"	ldr	%w0, %2\n"
  //判断next与owner是否相等
	"	eor	%w1, %w0, %w0, ror #16\n"
  //如果tmp不等于0，跳转标号1
	"	cbnz	%w1, 1f\n"
  //lockval中的next加1
	"	add	%w1, %w0, %3\n"
  //casa:Compare and Swap
  //比较lockval与tmp，如果相等，将tmp写入lockval，否则跳转标号2(原子指令)
	"	casa	%w0, %w1, %2\n"
  //將tmp中的next減去1
	"	sub	%w1, %w1, %3\n"
  //判斷lockval与tmp是否相等
	"	eor	%w1, %w1, %w0\n"
  /* lockval与tmp，相等：退出；不相等：跳转标号1，循环 */
	"1:")
	: "=&r" (lockval), "=&r" (tmp), "+Q" (*lock)
	: "I" (1 << TICKET_SHIFT)
	: "memory");

	return !tmp;
}

static inline void arch_spin_lock(arch_spinlock_t *lock)
{
	unsigned int tmp;
	arch_spinlock_t lockval, newval;

	asm volatile(
	/* Atomically increment the next ticket. */
	ARM64_LSE_ATOMIC_INSN(
	/* LL/SC */
"	prfm	pstl1strm, %3\n"
"1:	ldaxr	%w0, %3\n"
"	add	%w1, %w0, %w5\n"
"	stxr	%w2, %w1, %3\n"
"	cbnz	%w2, 1b\n",
	/* LSE atomics */
"	mov	%w2, %w5\n"
/* next加1 */
"	ldadda	%w2, %w0, %3\n"
"	nop\n"
"	nop\n"
"	nop\n"
	)

	/* Did we get the lock? */
"	eor	%w1, %w0, %w0, ror #16\n"
"	cbz	%w1, 3f\n"
	/*
	 * No: spin on the owner. Send a local event to avoid missing an
	 * unlock before the exclusive load.
	 */
/* 使CPU进入低功耗模式， 等待自旋 */
"	sevl\n"
"2:	wfe\n"
//==> 其他cpu唤醒本cpu，获取当前owner值
"	ldaxrh	%w2, %4\n"
"	eor	%w1, %w2, %w0, lsr #16\n"
"	cbnz	%w1, 2b\n"
	/* We got the lock. Critical section starts here. */
"3:"
	: "=&r" (lockval), "=&r" (newval), "=&r" (tmp), "+Q" (*lock)
	: "Q" (lock->owner), "I" (1 << TICKET_SHIFT)
	: "memory");
}

static inline void arch_spin_unlock(arch_spinlock_t *lock)
{
	unsigned long tmp;

	asm volatile(ARM64_LSE_ATOMIC_INSN(
	/* LL/SC */
	"	ldrh	%w1, %0\n"
	"	add	%w1, %w1, #1\n"
	"	stlrh	%w1, %0",
	/* LSE atomics */
	"	mov	%w1, #1\n"
	"	nop\n"
  /* owner加1 */
	"	staddlh	%w1, %0")
	: "=Q" (lock->owner), "=&r" (tmp)
	:
	: "memory");
}